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Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages

Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages

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How do you design and verify a package with tens of millions of pins — without losing months to manual rework? What you’ll learn… Why chiplet-based architectures demand new approaches to IC packaging How hierarchical device planning reduces overwhelming complexity The risks of spreadsheet-based workflows and why they’re no longer viable How early, multi-domain analysis helps avoid costly late-stage redesigns What Siemens’ Innovator 3D IC Portfolio offers for synchronized, error-proof design Where you’ll find it…. (01:50) Current changes in IC Packaging and the impact on the whole ecosystem (03:00) How to manage complexity scaling (03:35) What hierarchical device planning is and why it matters (05:00) How traditional methods fall short for high-pin-count designs (06:20) The risks and consequences of package assembly errors (07:00) What next-gen tools must deliver for designers (09:10) Siemens’ Innovator 3D IC Portfolio overview More about this episode… In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Per Viklund, Director of IC Packaging and RF Product Lines at Siemens EDA, about the growing challenge of managing chiplet and interposer complexity in advanced 3D IC designs. Per explains how hierarchical device planning enables designers to work at the right level of abstraction, streamlining the creation, optimization, and verification of massive, high-pin-count packages. The discussion covers why spreadsheet-based methods no longer cut it, the risks of unsynchronized workflows, and how early, multi-domain analysis can prevent costly late-stage redesigns. The episode also introduces Siemens’ Innovator 3D IC Portfolio — a unified, AI-infused solution designed to support the entire packaging workflow, from early planning through final layout, with built-in data management to eliminate version errors. Ideal for IC packaging engineers, 3D IC architects, chiplet designers, substrate fabricators, and verification professionals working on high-complexity designs. Connect with John McMillan LinkedIn Website Connect with Per Viklund LinkedIn Website
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