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3D IC

3D IC

著者： Siemens Digital Industries Software
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 As the semiconductor industry struggles with the limits of Moore’s Law, traditional monolithic scaling is no longer enough to meet performance, power, area and cost demands in technology, design, analysis, and manufacturing. 3D IC by Siemens is your go-to podcast for exploring the cutting-edge world of 3D IC packaging—a revolutionary approach reshaping semiconductor design, system integration, and heterogeneous computing. Join industry leaders, engineers, and innovators as we break down advanced IC packaging solutions like 2.5D/3D IC, FCBGA, FOWLP, and more. Discover how chiplets, multi-die integration, and high-bandwidth memory (HBM) are driving higher performance, lower power consumption, and scalable architectures. In each episode, we dive deep into the challenges and opportunities of IC design and manufacturing, including: Roadmap for advanced packaging and heterogeneous integration in semiconductor scaling Mainstream adoption of 3D IC—key challenges and breakthroughs Optimizing micro-architecture and integration platforms for performance and efficiency Strategic planning of chiplets and interposers for hierarchical device integration Leveraging early predictive multi-physics analysis to enhance design accuracy Automating design and routing for RDL-based fan-out wafer-level packaging (FOWLP) Exploring glass substrates for superior electrical and thermal performance Developing test-vehicles and daisy chain designs for architectural validation Ensuring reliability and manufacturability in 3D IC heterogeneous integration Mastering Signal Integrity (SI) and Power Integrity (PI) Analysis for high-speed systems Managing thermal challenges in stacked die architectures Subscribe now and stay ahead in the world of 3D IC. Learn more: Siemens 3D IC Packaging SolutionsSiemens Digital Industries Software 政治・政府
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  • The Hidden Heat Challenge of 3D ICs—and What Designers Need to Know

    The Hidden Heat Challenge of 3D ICs—and What Designers Need to Know
    2025/06/26
    Why is thermal analysis no longer an afterthought in 3D IC design—and what is Siemens doing to empower engineers across every step of the process? In this episode of the Siemens EDA Podcast Series on 3D IC chiplet ecosystems, host John McMillan welcomes András Vass-Varnai, 3DIC Solutions Engineer at Siemens Digital Industries, to spotlight one of the most critical (and often underestimated) challenges in modern chip design: thermal analysis. As power densities soar and chiplets stack closer together than ever before, effective thermal management is essential—not just for performance, but for reliability, lifespan, and product feasibility. András explores how Siemens is bridging the gap between design, packaging, and thermal engineering through integrated toolchains and a new generation of digital twins. Whether you're a silicon designer, package architect, or thermal analyst, this episode offers valuable insights into the future of collaborative thermal modeling, IP protection, and real-time simulation integration. What You’ll Learn in this Episode: Andrass Vass-Varnai’s background and current role at Siemens EDA (1:25) How is the shift to 3D IC packaging affecting thermal analysis? (2:35) What is the issue with the current approach to thermal analysis? (4:20) What is the significance of having thermal models for the customers? (6:50) Siemens' vision for the ideal future workflow (11:00) Conclusion and future outlook (17:00) Connect with John McMillan LinkedIn Website Connect with Andras Vass-Varnai LinkedIn Website
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    18 分
  • Why Traditional PCB Methods Fall Short in 3D IC Design

    Why Traditional PCB Methods Fall Short in 3D IC Design
    2025/06/12
    Why are companies rapidly adopting fan-out wafer-level packaging (FO-WLP)—and how does this shift impact the traditional chip design process? In this episode of the Siemens 3D IC Podcast Series, host John McMillan is joined by Chris Cone, IC Packaging Product Marketing Manager at Siemens EDA, to explore how fan-out wafer-level packaging is transforming advanced semiconductor packaging workflows. Chris shares his journey from analog design engineer to packaging and automation expert, and breaks down the growing need for intelligent, automated workflows that support the increasing complexity and size of modern designs. They discuss how new IC packaging techniques demand more automation, design iteration, and cross-functional collaboration than ever before—and why building a replayable, flexible automation language is the key to faster, scalable design success. Whether you're a layout engineer, SI/PI analyst, or replay coordinator, this episode will show you how to streamline your process using a common design framework and why human-readable automation is the next big leap in fan-out design. What You’ll Learn in this Episode: Chris Cone’s journey from analog IC designer to Siemens EDA packaging lead (1:10) What is fan-out wafer-level packaging, and why is it gaining traction? (1:50) How FOWLP is different than a traditional BGA design process (2:30) The four major phases in a fan-out packaging workflow, from tech setup to final verification (3:45) What is the impact on different roles, such as a package designer, layout designer, engineer, signal integrity, power, and integrity analysis? (8:00) The three essential traits of successful design automation (10:00) Key takeaways from real-world projects using Siemens’ automated packaging flows (11:45) Connect with John McMillan LinkedIn Website Connect with Chris Cone Website
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    13 分
  • 3D IC is Here—But Is Your Architecture Ready for It?

    3D IC is Here—But Is Your Architecture Ready for It?
    2025/05/29
    As 3DIC adoption ramps up, it’s becoming clear: microarchitecture needs a rethink. So how do you design hardware that can survive and thrive in the new era of stacked silicon? In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Pratyush Kamal, Director of R&D for 3D IC Solutions Engineering at Siemens Digital Industries. With decades of experience spanning Qualcomm and Google, Pratyush brings deep insight into the evolution of IC design—and how 3D integration is transforming every layer of the design stack. From redefining how and when microarchitecture decisions are made to overcoming the thermal, testing, and failure analysis challenges that come with 3D stacking, this episode dives into the critical topics design teams need to understand today. You’ll also hear how AI, automation, and cross-disciplinary expertise are reshaping team roles—and why software-defined silicon is redefining the design process itself. This episode is essential listening for IC architects, system designers, and packaging engineers navigating the transition to advanced 3D IC platforms. What You’ll Learn in this Episode: What is microarchitecture in IC design? (2:30) What does microarchitecture mean in 3D IC design? (3:20) How early do we need to consider microarchitecture in 3D IC design? (4:45) The main issues system designers face concerning the increasing complexity of microarchitecture (5:50) How are roles changing to enable a more holistic outlook on 3D IC microarchitecture? (9:15) What would enable non-silo design practice? (11:00) Closing thoughts (11:55) Connect with John McMillan LinkedIn Website Connect with Pratyush Kamal LinkedIn Website Explore More on 3D IC Innovation & Research: Deepen your understanding of 3D IC design with these valuable resources: Home | UCIe Consortium Die Stacking (3D) Microarchitecture | IEEE Conference Publication | IEEE Xplore Fine grain 3D integration for microarchitecture design through cube packing exploration | IEEE Conference Publication | IEEE Xplore Opportunities, Challenges and Mitigations in 3DIC Design, Test, and Analyses | IEEE Conference Publication | IEEE Xplore Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools | IEEE Journals & Magazine | IEEE Xplore
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    16 分

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